Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series1/EFR32FG1P/EFR32FG1P132F64GM32/LDMA/DBGHALT#0x0
DMA Channel Debug Halt Register
DMA Debug Halt
https://github.com/cmsis-svd/cmsis-svd-data